INDUSTRY

Semiconductor / chips

DaoAI's Semiconductor / chips: −90% Man-to-machine, 98% Accuracy. From wafer to advanced packaging — micron-level device-appearance and character inspection.

Semiconductor wafer defect detection
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Wafer, advanced-packaging, device-appearance and OCR inspection.

  • Automatic defect classification post-AOI: missed-detection rate <2%, manual re-review cut by 90%, throughput up 30%.

  • Post-bonding defect detection: 98% combined detection rate, 2x faster inspection cadence, missed detections near zero.

  • Fast coverage of rare defect types: learns new defect types quickly — >96% detection with false calls around just 0.2%.

  • End-to-end back-end coverage: one AI vision stack spans wafer, advanced packaging, die placement and character OCR.

On this page: the solution · 6 scenario deep-dives · case studies · long-form articles

Recommended systems: 3D ACI (AI-AOI) · AOI software

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THE SOLUTION

Semiconductor / chips, in detail

1. What is actually hard on this line

In back-end semiconductor work the problem is not detection — it is over-kill. To avoid missing a real defect, conventional AOI tightens its criterion and flags a large volume of nuisance along with it, leaving cleanroom staff to re-judge image by image. Over-kill can exceed a fifth of output: good die scrapped, and headcount parked at the re-judgement station.

The other half is novelty. Every change in advanced packaging brings a fresh set of defect appearances, none with enough samples to train a conventional CNN. And an escape at bonding is costed per device, sometimes per lot.

2. How the solution is put together

  • Triage first, judge second: AI-ADC separates real defects from nuisance so re-judgement volume falls, instead of trading detection against over-kill on a threshold.

  • Cover new defect classes from few samples: APDT positive-sample learning with the DaoAI World foundation model generalises to a new defect type from a handful of examples, without waiting for a full sample set.

  • Run inference at the equipment edge: defect classification moves into the ACI system itself, replacing image-by-image human re-judgement and lifting throughput with it.

  • Line integration: results and defect coordinates return to MES / YMS, traceable by lot and position. Production data stays inside the plant.

3. Choosing the configuration

Process stepRecommendedWhat it addresses
Post-AOI re-judgementAOI software (AI-ADC triage)Over-kill rate and manual re-judgement volume
Wafer surface3D ACIClassification and location of scratches, particles, chipping
Wire bonding / die attach3D ACI with edge inferenceSagging wires, attach offset, voids
Character / mark OCR2D ACI with OCR / OCVLegibility and consistency of laser marking

4. How deployment runs

DaoAI's deployment runs in four steps. ① Assessment — agree the boundary between real defect and nuisance; that boundary is where over-kill comes from. ② Configuration — match systems and mounting to process step and cleanroom requirements. ③ On-site deployment — model built from good product and the existing defect library; operators are up to speed in about 30 minutes. ④ Feedback — re-judgement results flow back, new defect classes are added from few samples, and the model updates in minutes.

5. What to measure afterwards

Four numbers: over-kill rate, escapes, manual re-judgement volume, inspection cadence. Across DaoAI's deployed semiconductor lines the typical picture is under 2% over-kill on post-AOI classification with manual re-judgement down 90% and cadence up 30%; 98% accuracy after wire bonding with double the throughput and escapes close to zero; and >96% classification accuracy on rare defects launched from few samples, with escapes around 0.2%.

Figures are the typical range our solution reaches in anonymised industry scenarios. Actual values vary with process step, device and existing defect library; on-site measurement governs.

Keep reading: scenario deep-dives · case studies · long-form articles

Case studies

Semiconductor / chips · wafer to package

From wafer auto-classification to wire-bond and advanced packaging — overkill goes down and defect escapes go to zero.

Scene · wafer ADC

A wafer fab · post-AOI auto defect classification

ChallengeConventional AOI overkill exceeds 20%; cleanroom re-judging is manual, scrapping good dies and inflating labour cost.

SolutionAI-ADC sorts true defects from nuisance; 3D ACI plus the world model generalises across many defect classes.

<2%Overkill
−90%Man-to-machine
+30%Throughput

Scene · post wire-bond

A packaging house · post-bond inspection

ChallengeBond defects such as depressed wires cause major downstream failures if they escape; manual re-judging is low-throughput.

SolutionAI defect classification runs at the edge inside the ACI machine, replacing image-by-image manual review.

98%Accuracy
×2Throughput
→0Escape rate

Scene · rare defects, few-shot

An advanced-packaging plant · covering rare defects fast

ChallengeAdvanced packaging keeps spawning new defect types; none have enough samples and traditional CNNs struggle to cover them.

SolutionAPDT positive-sample learning plus the DaoAI World model generalises to rare defects from only a handful of samples.

✓Few-shot
>96%Classification
~0.2%Escape rate

Cases are anonymised industry scenarios; the figures are typical ranges achievable with our solutions.

In-depth cases · IN-DEPTH

Semiconductor / Chips · in-depth cases

Each case breaks down the path to deployment in a real scenario — industry context, pain points, our solution and the results.

Semiconductor wafer defect inspection Semiconductor · 2026-06-16

Post-AOI Wafer Defect Auto-Classification: From Manual Review to AI-ADC

A wafer fab relied on manual AOI review with an overkill rate above 20%. With DaoAI AI-ADC, overkill dropped below 2%, review headcount fell 90%, and line throughput rose 30%.

Read more
Semiconductor chip laboratory inspection Semiconductor · 2026-06-14

Post-Wire-Bond Inspection: Defect Models Pushed to the ACI Edge

A packaging plant relied on manual visual inspection for post-bond defects like sagging wires, with occasional escapes. DaoAI embedded the defect model into the ACI edge device: 98% accuracy, doubled throughput, near-zero escapes.

Read more
Semiconductor chip manufacturing AOI Semiconductor · 2026-06-12

Rare Defects in Advanced Packaging: Few-Shot APDT Positive-Sample Learning

At an advanced packaging plant, new-process defect samples were too scarce for conventional supervised models. DaoAI combined APDT positive-sample learning with world-model generalization: rare-defect classification above 96%, escapes around 0.2%.

Read more
Advanced Packaging Bump Inspection: 3D ACI Catches Missing Bumps and Bridging at Micron Level Semiconductor · 2026-06-10

Advanced Packaging Bump Inspection: 3D ACI Catches Missing Bumps and Bridging at Micron Level

At an advanced packaging plant, micro-bump missing and bridging were hard to separate by 2D grayscale. DaoAI 3D ACI judges bump topography from micron-level height data, sharply improving missing and bridging detection.

Read more
Lead Coplanarity and Dicing Chipping: 3D Vision Measures Height Per Lead Semiconductor · 2026-06-08

Lead Coplanarity and Dicing Chipping: 3D Vision Measures Height Per Lead

At a packaging plant, lead coplanarity and dicing chipping were hard to quantify in 2D. DaoAI 3D vision measures height per lead and checks chipping per edge, cutting both coplanarity escapes and chipping misses.

Read more
AI Detection of Sunken Wires after Wire Bonding in Semiconductor Chips Semiconductor · 2026-07-05

AI Detection of Sunken Wires after Wire Bonding in Semiconductor Chips

In the semiconductor chip manufacturing process, wire bonding is one of the key processes, and the detection of sunken wires is crucial for ensuring chip

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AI Vision Detection of Semiconductor Chip Packaging Cracks Achieves Remarkable Results Semiconductor · 2026-07-08

AI Vision Detection of Semiconductor Chip Packaging Cracks Achieves Remarkable Results

In the process of semiconductor chip production, the detection of packaging cracks is crucial. WeLinkirt (DaoAI) provides an efficient solution for the

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AI Vision Inspection Results for Bump Missing/Bridge in Semiconductor Semiconductor · 2026-07-06

AI Vision Inspection Results for Bump Missing/Bridge in Semiconductor

In the semiconductor chip manufacturing process, the quality inspection of bumps is crucial. WeLinkirt provides an efficient and precise inspection

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AI Vision Inspection Results for Particle and Scratch Classification in Semiconductor Chips Semiconductor · 2026-07-07

AI Vision Inspection Results for Particle and Scratch Classification in Semiconductor Chips

In the semiconductor chip production process, accurate classification and detection of defects such as particles and scratches are crucial

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Remarkable Results of AI Vision Inspection for Semiconductor Wafer Map Defect Patterns Semiconductor · 2026-07-08

Remarkable Results of AI Vision Inspection for Semiconductor Wafer Map Defect Patterns

In the semiconductor industry, wafer map defect inspection is a crucial step in ensuring product quality

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Remarkable Results of AI Vision Inspection for Semiconductor Chip Pin and Dicing Defects Semiconductor · 2026-07-06

Remarkable Results of AI Vision Inspection for Semiconductor Chip Pin and Dicing Defects

In semiconductor chip production, the inspection of pin and dicing defects is crucial. WeLinkirt (DaoAI) uses advanced AI vision technology to provide an

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Local Deployment Solution for Die Attach Void Detection in Semiconductor Industry Semiconductor · 2026-07-07

Local Deployment Solution for Die Attach Void Detection in Semiconductor Industry

In the semiconductor industry, void detection in the die attach process is crucial. WeLinkirt provides a locally deployed detection solution for a leading

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New Breakthrough in Semiconductor Chip Laser Marking Character Detection Semiconductor · 2026-07-08

New Breakthrough in Semiconductor Chip Laser Marking Character Detection

In semiconductor chip production, the detection of laser-marked characters is crucial. WeLinkirt brings new changes to the industry with advanced

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Online 100% Inspection Solution for Semiconductor Wafer Edge Defects Semiconductor · 2026-07-07

Online 100% Inspection Solution for Semiconductor Wafer Edge Defects

In the semiconductor industry, the inspection of wafer edge defects is crucial. Traditional sampling inspection methods are difficult to meet the

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Remarkable Results of AI Vision Inspection for Semiconductor Lithography Pattern Defects Semiconductor · 2026-07-06

Remarkable Results of AI Vision Inspection for Semiconductor Lithography Pattern Defects

In the semiconductor chip manufacturing process, the inspection of lithography pattern defects is crucial

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Rare Defect Few-Sample Detection Solution for Semiconductor Advanced Packaging Semiconductor · 2026-07-05

Rare Defect Few-Sample Detection Solution for Semiconductor Advanced Packaging

In the field of semiconductor advanced packaging, the detection of rare defects with few samples is an industry challenge

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Semiconductor Wafer ADC Solution after AOI Inspection Semiconductor · 2026-07-05

Semiconductor Wafer ADC Solution after AOI Inspection

In the semiconductor chip manufacturing process, the quality inspection of wafers is crucial. Accurately classifying defects after AOI inspection is a key

Read more

FAQ

Semiconductor / Chip · AI Visual Inspection FAQ

What defects can AI vision detect in semiconductor manufacturing?

These include wafer surface scratches and particles, wire-bond quality, dicing chipping, missing or bridged bumps, coplanarity, and automatic defect classification (ADC) of rare defects. DaoAI stays stable under low-contrast, high-resolution conditions.

Rare defects are hard to collect, how can AI be trained with few samples?

DaoAI supports few-shot and unsupervised anomaly detection, modeling from good units or very few defect samples, and can flag never-before-seen rare defects as anomalies.

Can automatic defect classification (ADC) replace manual review?

Largely, yes. DaoAI ADC auto-classifies and grades defects, sharply reducing manual review so engineers focus only on a few high-risk categories, improving SPC decisions.

High-resolution inspection produces huge data, can it run on-premise to protect process IP?

Yes. DaoAI supports fully on-premise deployment, keeping wafer data inside the fab to meet strict process-IP and compliance requirements.