Semiconductor Pin Coplanarity & Chipping Detection: APDT Few-Shot Self-Training

DaoAI's 3D ACI equipment (proprietary 3D camera + 3D morphology reconstruction/point cloud, detecting 2D optical blind spot defects like hidden solder joints, coplanarity, micron-level morphology, and pores, with 2D-3D fusion) achieved an 82% reduction in false positives for pin coplanarity and dicing chipping defects at a mid-sized semiconductor packaging and testing facility, decreasing the rate from an industry-standard 15% to 2.7% through APDT few-shot self-training, significantly improving detection efficiency and yield. In the back-end packaging and testing stages of semiconductor manufacturing, pin coplanarity is a critical indicator for reliable electrical connection, while dicing chipping directly impacts chip mechanical strength and packaging quality. As chip integration increases and packaging forms become more complex, alongside the proliferation of advanced packaging technologies like Flip Chip and Wafer Level Packaging (WLP), the demands for precision and efficiency in detecting pin and edge defects are unprecedented. Traditional detection methods often struggle with micron-level or even sub-micron complex morphological features, particularly in high-mix, low-volume production. The time spent on model training and changeover debugging becomes a critical bottleneck limiting production capacity.

In the back-end processes of semiconductor manufacturing, pin coplanarity and dicing chipping are two common yet highly challenging defect types. Poor pin coplanarity can lead to open circuits or short circuits during chip-to-board soldering, severely impacting product reliability; dicing chipping, which refers to microscopic damage at the chip's edge during the dicing process, not only affects appearance but can also damage internal circuits or even cause fractures during use. This is particularly true for package types like BGA (Ball Grid Array) and QFN (Quad Flat No-leads), where pins or pads are dense and tiny. Traditional 2D vision inspection is limited by lighting, shadows, and viewing angles, making it difficult to accurately acquire 3D morphological information, leading to high rates of missed detections or false positives. DaoAI's 3D ACI equipment, with its unique APDT few-shot self-training capability, effectively addresses these challenges, ensuring the quality of semiconductor products. The equipment integrates DaoAI's independently developed high-precision 3D camera, capable of high-density point cloud acquisition on the chip surface and precise 3D morphology reconstruction, thus enabling micron-level accurate quantification and discrimination of defects such as pin coplanarity and dicing chipping.

Pain Points: Why This Hurdle is Difficult to Overcome

The difficulties in detecting semiconductor pin coplanarity and dicing chipping mainly manifest in several dimensions. Firstly, **high precision and micron-level requirements**: Modern chip pin pitches are generally in the sub-millimeter or even micron range, with pin coplanarity tolerances typically within ±10-30 microns. Traditional 2D vision struggles to detect such minute morphological differences, easily limited by optical distortion and shadow interference, leading to persistently high missed detection rates, which can reach 3-5% in the industry. Secondly, **defect diversity and complexity**: Dicing chipping comes in various forms, such as V-shaped, U-shaped, or fragmented, often accompanied by micro-cracks. These subtle defects often appear blurry in 2D images, making them difficult to distinguish from normal textures. Manual inspection can result in false positive rates of 10-15%, significantly affecting production line efficiency. Furthermore, **changeover challenges due to high-mix, low-volume production**: The semiconductor industry sees rapid product iteration and numerous SKUs. Traditional AOI systems require reprogramming or extensive sample training for each new product. Changeover downtime typically exceeds 30 minutes and requires experienced engineers for debugging, greatly increasing production costs and time. Finally, **difficulty in model deployment and maintenance**: Similar to the challenges faced in deploying AI quality inspection models for apparel from lab to production, semiconductor defect detection models, while performing well in laboratory settings, struggle with generalization on actual production lines due to complex factors like lighting, vibration, and batch-to-batch product variations. This necessitates continuous sample collection and retraining, consuming significant human and material resources.

These root problems primarily stem from: **Imaging limitations**: 2D optical imaging cannot provide depth information, making it impossible to determine height and volume information for 3D morphological defects such as pin warping, depressions, or chipping. It can only infer these from indirect features, leading to high uncertainty. **Rigidity of traditional algorithms**: Rule-based traditional AOI algorithms struggle to adapt to subtle variations and diversity in defect morphology. While deep learning models show potential, their reliance on large amounts of annotated samples is difficult to achieve in high-precision, defect-scarce industries like semiconductors. **Complexity of the production line environment**: Micro-dust in cleanrooms, equipment vibration, and subtle differences in surface reflectivity between different product batches can all interfere with optical imaging and detection results, demanding extreme robustness and adaptability from the detection system.

Technical Principles

The core of how DaoAI's 3D ACI equipment addresses these pain points lies in the deep integration of its unique **APDT (Autonomous Pre-trained Detection & Training) few-shot self-training technology** and its proprietary high-precision 3D camera. Firstly, the DaoAI 3D ACI equipment incorporates a self-developed 3D camera that uses structured light or laser triangulation principles to rapidly acquire high-density point cloud data of the chip surface with micron-level precision, reconstructing accurate 3D morphology in real-time. Compared to traditional 2D images, 3D point clouds directly provide critical geometric information such as pin height, tilt angle, coplanarity, and the depth and volume of chipping, completely eliminating detection blind spots caused by shadows and insufficient contrast. For instance, for pin coplanarity, this DaoAI equipment can directly measure the height deviation of each pin tip relative to a reference plane and calculate its maximum coplanarity error, improving detection accuracy to within ±5 microns, far surpassing traditional methods. Furthermore, DaoAI's 3D ACI equipment utilizes 2D-3D fusion technology, combining texture and color information from high-resolution 2D images with 3D morphological data to achieve more comprehensive defect recognition, especially for defects like dicing chipping that possess both morphological and textural characteristics, resulting in superior identification.

Secondly, its APDT few-shot self-training capability is crucial for achieving rapid changeover and high generalization. Traditional deep learning models require thousands or even tens of thousands of annotated defect images for training, which is almost impossible in the semiconductor industry. APDT technology, based on the visual foundation models embedded in DaoAI ACI OS, leverages transfer learning and self-supervised learning to complete rapid model self-training with only 1-20 good samples, or even just one good sample, within 5 minutes. This means that when a production line switches to a new product model, there's no need for extensive defect samples; by simply scanning a few good products, the system quickly learns their normal features and automatically identifies anomalies. This significantly reduces changeover downtime from over 30 minutes (industry standard) to under 5 minutes. Compared to traditional AOI that relies on manual rule programming, APDT not only eliminates tedious parameter adjustments, greatly reduces false positive rates, but also boasts stronger environmental adaptability and defect recognition capabilities, thereby consistently keeping the missed detection rate at a mid-sized semiconductor packaging and testing facility below <0.4%.

Typical Application Scenarios

• **IC Package Pin Coplanarity Detection**: For defects such as coplanarity, warping, bending, and missing pins across various package types like QFP, QFN, and BGA. DaoAI's 3D ACI equipment uses high-precision 3D point clouds to directly measure the relative height of pin tips to the reference plane, accurately calculating coplanarity and avoiding 2D vision measurement errors caused by viewing angles and lighting. The challenge lies in dense and reflective pins, where traditional methods are prone to misjudgment.
• **Dicing Chipping and Crack Detection**: After wafer dicing, this involves detecting chipping, burrs, and micro-cracks on the chip edges. The equipment's 3D morphology reconstruction capability precisely captures tiny deformations and depressions on the edges, combined with 2D image texture analysis, achieving effective identification of sub-micron chipping. The challenge is the diverse forms of chipping and difficulty in distinguishing them from normal cutting textures.
• **Pad/Bump Height and Morphology Detection**: For BGA package solder ball height, coplanarity, and morphology consistency, as well as flip-chip bump height and integrity detection. DaoAI's 3D ACI equipment can perform precise 3D measurements of solder balls or bumps to determine if they meet design specifications, ensuring soldering reliability. The challenge lies in dense, tiny, and reflective solder balls.
• **Chip Surface Foreign Object and Scratch Detection**: Utilizing high-resolution 3D morphological data to detect minute foreign objects, scratches, and indentations on the chip surface. Even transparent or translucent foreign objects can be accurately identified by their tiny protrusions or depressions in the 3D morphology. The challenge is that foreign objects are typically micron-sized and have similar colors to the chip surface, making 2D differentiation difficult.

Case Study

A mid-sized semiconductor packaging and testing facility, specializing in various IC packaging and testing services, had long faced challenges with high false positive rates and low changeover efficiency in pin coplanarity and dicing chipping detection. The factory operates dozens of production lines with frequent product model changes. Traditional AOI equipment required at least 40 minutes for parameter adjustment and sample collection during each changeover, severely impacting production rhythm. Furthermore, as 2D AOI struggled to effectively identify certain 3D morphological defects, the volume of manual re-inspection was immense. Production line data indicated that the false positive rate was as high as 15%, leading to numerous good products being misidentified and high rework costs. After introducing DaoAI's 3D ACI equipment, the situation improved significantly. The factory initially deployed the system on a QFN packaging line for a pilot project. Leveraging the APDT few-shot self-training function of DaoAI's 3D ACI equipment, the model training and deployment for new products were completed in just 3 minutes by scanning only 5 good samples. After deployment, the system's detection accuracy for QFN package pin coplanarity and dicing chipping defects greatly improved. Production line data showed that the false positive rate decreased from 15% to 2.7%, and the missed detection rate was consistently kept below 0.3%. Concurrently, changeover time was reduced from the original 40 minutes to under 5 minutes, saving an average of 87.5% of changeover time and significantly enhancing production line flexibility and uptime. In this case, DaoAI's 3D ACI equipment successfully addressed the customer's practical pain points through precise 3D measurement and efficient few-shot learning.

DaoAI's 3D ACI equipment, with its APDT few-shot self-training capability, reduced false positives at a semiconductor packaging plant by 82% and changeover time by 87.5%, truly balancing high precision with high efficiency.

DaoAI Solutions and Products

DaoAI's 3D ACI equipment serves as the core of this solution, with its powerful APDT few-shot self-training capability being key to achieving rapid and precise detection. The equipment is embedded with the DaoAI ACI OS operating system, which integrates visual foundation models and the APDT module, enabling users without specialized AI knowledge to complete model training through a simple interactive interface. In practical deployment, customers only need to place good samples for inspection in the detection area of the DaoAI 3D ACI equipment. The system automatically collects 3D point cloud and 2D image data, and then performs self-supervised learning via the APDT module to quickly build a good product feature model. For new products, this process typically completes within 5 minutes, greatly reducing the skill requirements for engineers and the time spent on changeover debugging. Furthermore, DaoAI's 3D ACI equipment supports 100% on-premise private deployment, with all data processed within the customer's factory, ensuring strict adherence to data security and intellectual property requirements in the semiconductor industry. The DaoAI World foundation model, as a unified base, also provides the 3D ACI equipment with powerful semantic understanding and cross-scenario generalization capabilities, enabling it to continuously learn from production line feedback and optimize detection performance.

DaoAI's 3D ACI equipment is more than just a simple superposition of hardware and software; it represents a new paradigm in intelligent inspection. Through the high-precision 3D morphological data provided by its proprietary 3D camera, combined with APDT few-shot self-training, DaoAI's 3D ACI equipment has achieved a qualitative leap in semiconductor pin coplanarity and dicing chipping detection. Production line data shows that the false positive rate for pin coplanarity and dicing chipping defects at a mid-sized semiconductor packaging and testing facility was reduced by 82%, and changeover time was cut from 40 minutes to under 5 minutes. This solution significantly reduced manual re-inspection workload, lowered operating costs, and substantially improved overall production line efficiency and product yield, bringing significant business value to the customer. DaoAI is committed to providing reliable and efficient intelligent inspection solutions for high-precision manufacturing fields like semiconductors through innovative technology.

Full solution for this scenario: the full inspection solution for 3D ACI Equipment

This article was generated by AI. Customer cases are simulated scenarios based on real product capabilities and figures are illustrative; see product pages for official benchmarks.